The present invention relates to a video signal recording/reproducing apparatus such as a color video tape recorder (VTR). More particularly, the present invention relates to a generator device for a carrier signal necessary for frequency conversion of a color signal of a VTR, a luminance signal processing device and a color signal processing device which are included in the VTR (hereinafter, such devices will be sometimes referred to as video signal processing apparatus or devices generically.) The present invention further relates to a semiconductor integrated circuit (IC) apparatus which is suitable for provision of such a device or devices in an IC configuration.
With the formulation of electronic circuit systems of VTRs inclusive of household VTRs into IC configuration, circuit systems having better cost performance have been extensively developed and endeavors to improve, the quality of an image on a display screen have been made.
A color signal processing device (or unit) plays an important part, especially, for improvement of the image quality. The color signal processing device includes therein a carrier signal generating circuit for generating a carrier signal necessary for frequency conversion of a color signal.
In a household VTR, a color signal is band-converted to a lower frequency band of a luminance signal subjected to frequency modulation (FM) or frequency conversion and is thereafter recorded or reproduced. In a VTR system in which the carrier frequency of the lower-band converted color signal is 40f.sub.H (f.sub.H : the frequency of a horizontal synchronizing signal), the frequency f.sub.C of a carrier signal necessary for band conversion is f.sub.SC +40f.sub.H (f.sub.SC : color subcarrier frequency of video signal).
One of the conventional systems in which such a carrier frequency signal f.sub.C of f.sub.SC +40f.sub.H is generated has been disclosed by JP-A-57-123785. In the disclosed system, n.times.40f.sub.H is divided by n to generate a 4-phase signal including four 40f.sub.h signals the phases of which having a phase difference of 90.degree. therebetween are passed through low-pass filters (LPF's) to two frequency converters in combination with two signals generated from a crystal oscillator of f.sub.SC and having a phase difference of 90.degree. therebetween, so that outputs of the two frequency converters are synthesized to generate f.sub.SC +40f.sub.H.
In another system as has been disclosed by The Institute of Television Engineers of Japan (ITEJ) Technical Report Vol. 12, No. 17, pp. 1-6, TEBS'88-8, May 1988 reported by the present inventors, a signal from a voltage controlled oscillator (VCO) is frequency-divided divided to generate a one-phase or single-phase 40f.sub.H component. After the single-phase 40f.sub.H component has been passed through an LPF and frequency-converted with an f.sub.SC signal, only an f.sub.SC +40f.sub.H component is extracted to generate a 4-phase signal which includes four signals having a frequency of f.sub.SC +40f.sub.H and a phase difference of 90.degree..
Each of the above-mentioned systems includes a frequency conversion circuit for multiplying an f.sub.SC signal and a 40f.sub.H signal by each other and a low-pass filter (LPF) for reducing harmonics of the 40f.sub.H signal of a rectangular waveform. Outputs of a 40f.sub.H signal generating circuit and a frequency converter contain unnecessary signal components including frequencies of l .times.40f.sub.H and mf.sub.SC .+-.n.times.40f.sub.H, wherein l is an integer equal to or greater than 2, m an integer equal to or greater than 1, and n an integer equal to or greater than 2. A band-pass filter (BPF) and so on are provided on the output side of the frequency converter in order to eliminate those unnecessary signal components. However, complete elimination of the undesired signal components is impossible. Also, there is a fear that the unnecessary signal components may have crosstalk with another circuit block on an integrated circuit device through power source lines, grounded lines and so on, thereby deteriorating the signal-to-noise (S/N) ratio.
Means for solving some of the above-mentioned problems is disclosed by U.S. Pat. No. 4,860,120 issued on Aug. 22, 1989. However, the disclosed system needs a linear converter for a PLL (phase-locked loop) circuit and hence the number of circuit components required is large. As a result, the disclosed system is not advantageous in providing the system in an IC configuration. Further, the solution to the problem of crosstalk is not sufficient.
In a luminance signal processing device in a video signal processing apparatus, each of a dynamic emphasis circuit for a recording system and a dynamic de-emphasis circuit and a noise cancellation circuit for a reproducing system includes an amplitude limiting circuit. In one example of the luminance signal processing, a noise suppression circuit as shown in FIG. 7 is provided for suppressing noises in a luminance signal reproduced. Referring to FIG. 7, a video signal supplied to an input terminal 71 is applied through a high-pass filter (HPF) 72, a limiter circuit 73, an attenuator 74 and a low-pass filter, (LPF) 75 to a subtracter 76 in which the output of the LPF 75 is substracted from the input signal applied directly from the input terminal 71. The output of the subtracter 76 is delivered to an output terminal 77.
A typical conventional example of the limiter circuit 73 employs a differentially operating type of limiter circuit which includes diodes as shown in FIG. 8. Referring to FIG. 8, limiter circuit includes input terminals 78 and 79, differentially operative transistors Q.sub.71 and Q.sub.72, load resistors R.sub.71 and R.sub.72, diodes D.sub.71 and D.sub.72, and output terminals 80 and 81.
The characteristic of the limiter circuit shown in FIG. 8 will now be explained with reference to FIGS. 9A and 9B. For a sinusoidal input signal 83, as shown in FIG. 9A, having an amplitude at which the transistors Q.sub.71 and Q.sub.72 are switched, the output of the limiter circuit of FIG. 8 takes a distorted waveform as shown by solid line 84 in FIG. 9B. On the other hand, in the case where the diodes D.sub.71 and D.sub.72 are not provided, the amplitude is limited to provide a planar form as shown by broken line 85 in FIG. 9B. Namely, in the construction shown in FIG. 8 in which the diodes D.sub.71 and D.sub.72 are provided, a waveform distortion having a characteristic frequency component is generated upon transient response and a zero-crossing point is delayed. Therefore, the response waveform is different depending upon an input frequency. Also, the response waveform includes points of discontinuous folding or inflection, as seen from the waveform 85 shown in FIG. 9B.
Accordingly, when a limiter circuit is used for the processing of a luminance signal, a waveform distortion is generated, thereby deteriorating the quality of an image.
When a signal processing circuit, for example, a CR constant circuit used in a color signal processing circuit of a recording system is to be formed in the form of a semiconductor integrated circuit, it should be considered that the characteristics of circuit elements formed in the semiconductor integrated circuit may have manufactural fluctuations or deviations which are relatively large. Therefore, there is employed a method in which a resistor and a capacitor constituting an oscillator circuit, a filter circuit or the like are provided by external parts so that adjustment or compensation for the manufactural fluctuations is made to obtain a desired oscillation frequency or a desired frequency response. In this case, the cost for adjustment and the cost of circuit components or parts become large.
Therefore, attempts to make the adjustment of such circuits unnecessary have been made. For example, the semiconductor integrated circuit device HA11856 for color signal processing sold by Hitachi Ltd. uses a PLL (phase-locked loop) system. In this system, a fixed reference frequency which is formed by a crystal oscillator and an oscillating signal to be controlled which is formed by a voltage controlled oscillator circuit, are supplied to a phase detection circuit to generate a control signal corresponding to a phase difference between the two supplied signals, and the control signal is supplied to a variable junction capacitance element (or vari-cap) which forms the voltage controlled oscillator circuit. Thereby, the reference frequency and the oscillation frequency are made accurately coincident with each other.
The control signal is also supplied to a vari-cap which forms an active filter or another oscillator circuit and which is provided with the same structure, and laid out in proximity to, the vari-cap of the above-mentioned voltage controlled oscillator circuit so as to have good pairing therewith. As a result, the manufactural fluctuation or unevenness of the CR constant of a CR constant circuit formed by a semiconductor integrated circuit is absorbed or controlled.
JP-A-64-48592 by the present inventors laid open on Feb. 23, 1989 shows a CR constant control circuit by it is acknowledged as being prior art.
The above-mentioned PLL system requires the voltage-controlled oscillator circuit, the phase detection circuit and a loop filter which form a PLL circuit. Namely, the number of circuit elements required is large and a circuit construction becomes complicated. Further, the complicated circuit construction makes it difficult to provide pairing of circuit elements with sufficient precision.